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		<title>Concept: Reimagining Cygwin&#8217;s package manager</title>
		<link>http://psmay.com/2012/04/29/concept-reimagining-cygwins-package-manager/</link>
		<comments>http://psmay.com/2012/04/29/concept-reimagining-cygwins-package-manager/#comments</comments>
		<pubDate>Sun, 29 Apr 2012 21:14:24 +0000</pubDate>
		<dc:creator>psmay</dc:creator>
				<category><![CDATA[Concept]]></category>

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		<description><![CDATA[Synopsis: Cygwin is a POSIX-like/Linux-like environment available for Windows; we only wish that its package manager (non-initiates, read: &#8220;app store&#8221;) were a bit more like apt-get/Synaptic et al. For those of us who have become reliant on unixish tools for any sort of productivity, the venerable Cygwin is the special sauce that makes Windows feasible &#8230;<p><a href="http://psmay.com/2012/04/29/concept-reimagining-cygwins-package-manager/" class="more-link">Read More</a></p>]]></description>
			<content:encoded><![CDATA[<p><a href="http://cygwin.com/">Synopsis: Cygwin</a> is a POSIX-like/Linux-like environment available for Windows; we only wish that its package manager (non-initiates, read: &#8220;app store&#8221;) were a bit more like apt-get/Synaptic et al.</p>
<p><span id="more-518"></span>For those of us who have become reliant on unixish tools for any sort of productivity, the venerable Cygwin is the special sauce that makes Windows feasible for anything, and that&#8217;s important everywhere you&#8217;re stuck with Windows (e.g. your mid-size business employer that relies on the Microsoft stack). Additionally, Cygwin was a large part of how I learned to use unixy environments in the first place<sup>[<a href="#concept-reimagining-cygwins-package-manager-n-1" class="footnoted" id="to-concept-reimagining-cygwins-package-manager-n-1">1</a>]</sup>, and might still be for a number of users.</p>
<p>A package manager is a concept with which users of any actual Linux distribution will be familiar. For those who use smartphones, it&#8217;s the very basis for what&#8217;s now known as an &#8220;app store&#8221; or &#8220;market&#8221;: If you have a program you haven&#8217;t installed but would like to run, rather than going to the product&#8217;s website and downloading an installer (as is traditional on Windows and other platforms), you locate their product in the platform&#8217;s repository and hit install from there. The product itself is provided as a package, which contains most of the same data as an installer but is a little lighter (see below). The advantages of package managers over traditional installers include:</p>
<ul>
<li>Since the package manager exists to do the job, a package need not include the program logic that unpacks it, making the download size somewhat smaller.</li>
<li>The package can specify to your package manager what prerequisite packages (e.g. for other programs or libraries) may need to be installed for it to work, freeing the user from downloading, (and the developer from packaging) prerequisites the user probably already has installed.</li>
<li>The experience of installing a program from the package manager is uniform from one program to another. It is generally as simple as possible; if the package doesn&#8217;t absolutely require some piece of configuration information before being installed (most don&#8217;t), you select a package, say OK to any dependencies, hit Apply, and then let it do its downloading and unpacking work. Once the box disappears, that program is ready.</li>
<li>The experience of uninstalling a program is similarly uniform. You unselect a package, then the process proceeds as with installing.</li>
</ul>
<p>For those more comfortable with the command line, Linux distros have command-line versions of their package managers that do the same job. For example, if the GIMP happens not to be installed on an APT-based distro (like Debian or Ubuntu) it&#8217;s very likely that <code>sudo apt-get install gimp</code> will do exactly what I need it do.</p>
<p>Predictably, Cygwin has its own package manager, which is in fact the same program used to install Cygwin in the first place: <a href="http://sourceware.org/cygwin-apps/setup.html">setup.exe</a>.</p>
<div id="attachment_523" class="wp-caption aligncenter" style="width: 310px"><a href="http://psmay.com/wp-content/uploads/2012/04/install-perl.png"><img class="size-medium wp-image-523 " title="install-perl" src="http://psmay.com/wp-content/uploads/2012/04/install-perl-300x203.png" alt="" width="300" height="203" /></a><p class="wp-caption-text">Synaptic (GUI for apt) and Cygwin setup.exe (via Wine) running side-by-side. The similarities are fleeting.</p></div>
<p>For a certain class of users and/or use cases, setup.exe does its job really well. As indicated by its name, it&#8217;s better for a first-time install than anything else. Perhaps its most important features are its size (under 700K in the pictured version) and its lack of external dependencies, both properties becoming of an installer program. It&#8217;s written in C++ and compiled on the <a href="http://en.wikipedia.org/wiki/MinGW">MinGW</a> toolchain<sup>[<a href="#concept-reimagining-cygwins-package-manager-n-2" class="footnoted" id="to-concept-reimagining-cygwins-package-manager-n-2">2</a>]</sup>, meaning it&#8217;s written as a Windows program rather than a Cygwin program, which caters to both of those ends.</p>
<p>But, and I do mean this in the nicest and most respectful way, setup.exe kinda sucks as package managers go. Here are some of the lowlights and my proposed solutions:</p>
<ul>
<li>As an installer, it puts way too much of the decision-making process up front. You get a wizard page to choose your local package cache directory, one for proxy setup, one for which repository (&#8220;mirror&#8221;) you want to use, and then the huge one for package selection. An &#8220;express&#8221; mode would be great: Either detect my proxy settings or don&#8217;t ask for them until connecting by conventional means fails. Choose the mirror that seems e.g. closest to me. Start downloading the packages that are part of the minimal system. Perhaps let me choose the other packages I&#8217;d like to install while that download happens; it does take a while.</li>
<li>As a package manager, it acts way too much like an installer. If I&#8217;m running the program to install one new package, it&#8217;s sad that I <del>have to approve my previous selections for local cache, proxy setup, etc. a second time</del> <ins>have to pass -M to the installer to skip repeating my previous selections</ins>. Take me directly to the package selection screen with just an option <ins>that is GUI-accessible</ins> to go back and change those things.</li>
<li>The dependencies aren&#8217;t calculated until the page after package selection. Synaptic has the option (enabled by default) to show you the dependency changes as you select a package, and that&#8217;s pretty useful.</li>
<li>Only one repository can be used at a time. This is painful when you consider that <a href="http://sourceware.org/cygwinports/">Cygwin Ports</a> (cf. &#8220;universe&#8221; in Ubuntu) is implemented as a separate, complementary repository, often with dependencies in the primary repository. In e.g. Debian-based systems, repositories can co-exist. Ubuntu takes it a step further with <a href="https://help.launchpad.net/Packaging/PPA">PPAs</a>, which allow third-party developers to package and deploy their software in their own special-purpose repositories, making messy manual installation of third-party packages unnecessary.</li>
<li>Properly, once the platform is installed, starting the package manager means executing its command (e.g. <code>apt-get</code>) from your preferred interface on that platform. That&#8217;s not straightforward with setup.exe because setup.exe does not install setup.exe on your platform. Those with the foresight to have stashed it will have to locate that copy; the rest will need to re-download it from cygwin.com.</li>
<li>There is no real command-line interface to setup.exe.</li>
<ul>
<li>It accepts command-line parameters, but doesn&#8217;t provide the functionality of e.g. apt-get.</li>
<li><a href="http://code.google.com/p/apt-cyg/">apt-cyg</a> does a good job of filling this gaping hole, but it does lack certain features (e.g. <del>doesn&#8217;t check digests</del> <ins>[edit: it does in fact check the MD5s, but doesn't check the signature on the list file itself]</ins>).</li>
</ul>
</ul>
<p>I think the installer and the package manager should be two (perhaps more) programs; they have separate goals that are better served separately. The former needs to be small and light but not necessarily full featured, while the other needs to do more but can be a bit heavier.</p>
<p>A really straightforward approach would be to factor out an installer that, without extensive configuration, installs just enough of the Cygwin platform to run a complete package manager. This installer wouldn&#8217;t be complicated and could easily be smaller than setup.exe. Without the full-blown package/version selection step, it could be implemented with something like <a href="http://nsis.sourceforge.net/">NSIS</a> or <a href="http://wix.sourceforge.net/">WiX</a>. For admins and other nitpickers, it wouldn&#8217;t be all that hard to change the installer script to change what packages are installed by that initial installer, or to fix a default repository. Otherwise, that first step needs to be as short as possible in order to make the next step seem like part of it.</p>
<p>The next step, of course, is the complete package manager. Personally, I&#8217;d enjoy a port of APT to Cygwin, partly because it works well in Ubuntu, and partly because there&#8217;s a host of other tools that work with it, such as Synaptic (which could work nicely with the Windows port of GTK+). But that&#8217;s not perfectly straightforward because Cygwin uses its own package system. The system itself is not fundamentally too different from APT, but it is different in several details. Now, porting APT to other package managers isn&#8217;t anything that hasn&#8217;t been done before (for a while there was an APT for RPM), but it would involve a lot of digging around in C++ and require the effort of maintaining an entire active port.</p>
<p>I&#8217;ve been trying to figure out exactly what the right approach might be, this post in fact being part of that process. I wonder now if the right approach, or at least a good bootstrap, might be to</p>
<ol>
<li>Port apt-get (and other tools as necessary) directly to Cygwin with little to no alteration. (Some alteration is likely to be necessary.)</li>
<li>Develop a translation proxy, perhaps as a local HTTP server, that would alter paths and perhaps in fact convert Cygwin packages (each being .tar.bz2 archives containing installable files plus, in parallel, supporting metadata) into Debian-style packages (.deb packages, which are two optionally-compressed .tar archives, one metadata and one payload, glued back-to-back in a more obscure .ar archive).</li>
<ul>
<li>While we&#8217;re at it, let&#8217;s implement it in a more approachable language than C++. Perhaps Ruby or Python. This isn&#8217;t an application that requires super speed, but super maintainability would be nice.</li>
</ul>
</ol>
<p>The way I see it, there are two directions it could go from there.</p>
<p>In one outcome, the above development is a bootstrap for porting APT to the Cygwin package system, by way of a complete separate port or by somehow implementing a pluggable backend for multiple package systems.</p>
<p>In the other, the above development is a bootstrap for converting Cygwin at large over to using .deb repositories. The repository format simulated by the real-time proxy at first would be deployed for real on Cygwin mirrors. In fact, code from the proxy program could be used at the server to convert an entire mirror from one format to the other.</p>
<p>I like the latter scenario, even if it would involve convincing more people, just because it wouldn&#8217;t require any actual development beyond the conversion proxy. Maintaining a converter proxy doesn&#8217;t sound like nearly as big a job as maintaining a fully distinct port of APT. Plus, the conversion period could be arbitrarily lengthy because the proxy would work throughout the meantime. An additional pro to this is the possibility of adding a PPA-like system for third-party devs. Because APT supports multiple repositories at once, Cygwin, Cygwin Ports, and PPAs would co-exist in harmony. Because of the proxy, Cygwin and Cygwin Ports could even be in the current format while PPAs are implemented directly in APT form.</p>
<p>That might be worth investigating, eh?</p>

<ol class="footnotes">
	<li class="footnote" id="concept-reimagining-cygwins-package-manager-n-1"><strong><sup>[1]</sup></strong> To drop some history: Back in the dark times of 2000 or so, GParted wasn&#8217;t yet a thing and virtual machines weren&#8217;t quite feasible for much, so installing Linux meant having to gingerly repartition your drive, hoping that nothing got ruined, and setting up a bootloader for dual boot. If you didn&#8217;t set up your networking just so on the first try, you&#8217;d have to boot back into Windows to look up a solution (often repeated ten or fifty times). Around that time, NTFS support in Linux wasn&#8217;t so great either; it was read-only at best, so any significant sharing of data between systems would require a FAT partition. The situation wasn&#8217;t significantly better until, let&#8217;s say, 2007 or so, when <a href="http://en.wikipedia.org/wiki/NTFS-3G">ntfs-3g</a> brought in read-write NTFS support and <a href="http://en.wikipedia.org/wiki/Ubuntu_%28operating_system%29">Ubuntu&#8217;</a>s mission for a stable desktop Linux had gained some ground. (I hopped onto the Ubuntu bandwagon for keeps around <a href="http://en.wikipedia.org/wiki/Ubuntu_6.06">2006</a>, at which point I had a PowerBook to fall back to in dire straits.) Cygwin, being not an OS but a compatibility layer, allowed casual tinkerers and power users alike to avoid much of the mess. <a class="note-return" href="#to-concept-reimagining-cygwins-package-manager-n-1">&#x21A9;</a></li>
	<li class="footnote" id="concept-reimagining-cygwins-package-manager-n-2"><strong><sup>[2]</sup></strong> Both Cygwin and MinGW provide GCC for Windows, but Cygwin-targeting code requires Cygwin&#8217;s unix-like simulation layer while MinGW targets the Windows API directly. <a class="note-return" href="#to-concept-reimagining-cygwins-package-manager-n-2">&#x21A9;</a></li></ol>
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		<title>Fun With Math: A Natural Number is a Multiset of Prime Factors</title>
		<link>http://psmay.com/2012/02/17/fun-with-math-a-natural-number-is-a-multiset-of-prime-factors/</link>
		<comments>http://psmay.com/2012/02/17/fun-with-math-a-natural-number-is-a-multiset-of-prime-factors/#comments</comments>
		<pubDate>Fri, 17 Feb 2012 15:17:41 +0000</pubDate>
		<dc:creator>psmay</dc:creator>
				<category><![CDATA[Non sequitur]]></category>

		<guid isPermaLink="false">http://psmay.com/?p=515</guid>
		<description><![CDATA[A rule known as the fundamental theorem of arithmetic states, in so many words, that any natural number is uniquely representable as a multiset of prime factors, and vice versa. Having two operands in this form makes some operations easier and other ones more difficult. This discussion assumes certain definitions of terminology: natural number : &#8230;<p><a href="http://psmay.com/2012/02/17/fun-with-math-a-natural-number-is-a-multiset-of-prime-factors/" class="more-link">Read More</a></p>]]></description>
			<content:encoded><![CDATA[<p>A rule known as the <a href="http://mathworld.wolfram.com/FundamentalTheoremofArithmetic.html">fundamental theorem of arithmetic</a> states, in so many words, that any natural number is uniquely representable as a multiset of prime factors, and vice versa. Having two operands in this form makes some operations easier and other ones more difficult.</p>
<p>This discussion assumes certain definitions of terminology:</p>
<ul>
<li><a href="http://mathworld.wolfram.com/PositiveInteger.html">natural number</a> : A positive integer; an integer 1 or greater.</li>
<li><a href="http://mathworld.wolfram.com/PrimeNumber.html">prime number</a> : A natural number with exactly two distinct natural factors, 1 and itself. In particular, 2 satisfies this requirement despite being even, while 1 does not satisfy this requirement because it has only one such factor instead of the required two.</li>
<li><a href="http://mathworld.wolfram.com/Multiset.html">multiset</a> : A generalization of a set wherein the multiplicity of each item is significant.</li>
</ul>
<p>The natural number indicated by a given multiset is the product of 1 and each element of the multiset. For example, 1 is represented by the empty multiset {∅}, 3 by {3}, 5 by {5}, 15 by {3,5}, 25 by {5,5}, and so on.</p>
<p>Multiset operations on the multisets correspond to other operations on the natural numbers they represent:</p>
<ul>
<li>Intersection (i.e. retaining the lesser multiplicity per element) is equivalent to finding the greatest common divisor (gcd):
<ul>
<li>gcd(54, 24)</li>
<li>{2, 3, 3, 3} ⋂ {2, 2, 2, 3}</li>
<li>{2, 3}</li>
<li>6</li>
</ul>
</li>
<li>Union (i.e. retaining the greater multiplicity per element) is equivalent to finding the least common multiple (lcm):
<ul>
<li>lcm(8, 12)</li>
<li>{2, 2, 2} ∪ {2, 2, 3}</li>
<li>{2, 2, 2, 3}</li>
<li>24</li>
</ul>
</li>
<li>Addition of the multiset (i.e. retaining the sum of multiplicities per element) is equivalent to multiplication:
<ul>
<li>414 * 555</li>
<li>{2, 3, 3, 23} + {3, 5, 37}</li>
<li>{2, 3, 3, 3, 5, 23, 37}</li>
<li>229770</li>
</ul>
</li>
<li>Subtraction of the multiset (i.e. retaining the differences of multiplicities per element between one set and another) is equivalent to division:
<ul>
<li>88088 / 2002</li>
<li>{2, 2, 2, 7, 11, 11, 13} − {2, 7, 11, 13}</li>
<li>{2, 2, 11}</li>
<li>44</li>
<li>Note that this division is not closed on natural numbers unless the result would also be a natural number (i.e. the left operand must be divisible by the right) because the multiset subtraction itself is not closed on multisets (with nonnegative multiplicities). The multiset notation can still help to reduce the fraction to lowest terms:</li>
<ul>
<li>2310 / 273</li>
<li>{2, 3, 5, 7, 11} − {3, 7, 13}</li>
<li>{2, 5, 11} − {13} (since the multiset can&#8217;t have negative multiplicities, this is the simplest form)</li>
<li>110 / 13</li>
</ul>
</ul>
</li>
<li>Multiplying all of the multiplicities in the set by <var>n</var> yields the number to the <var>n</var>th power:
<ul>
<li>168<sup>4</sup></li>
<li>{2, 2, 2, 3, 7} multiplicities multiplied by 4</li>
<li>{2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 3, 3, 3, 3, 7, 7, 7, 7}</li>
<li>796594176</li>
</ul>
</li>
<li>If all of the multiplicities in the set are themselves divisible by <var>n</var>, dividing them yields the <var>n</var>th root of the number:
<ul>
<li>∛474552</li>
<li>{2, 2, 2, 3, 3, 3, 13, 13, 13} multiplicities divided by 3</li>
<li>{2, 3, 13}</li>
<li>78</li>
</ul>
</li>
<li>Meanwhile, the natural-to-multiset transform won&#8217;t help you at all with addition and subtraction.</li>
</ul>

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		<title>Multi-shot (Multiple monostables on one timer)</title>
		<link>http://psmay.com/2012/01/23/multi-shot-multiple-monostables-on-one-trigger/</link>
		<comments>http://psmay.com/2012/01/23/multi-shot-multiple-monostables-on-one-trigger/#comments</comments>
		<pubDate>Mon, 23 Jan 2012 18:53:34 +0000</pubDate>
		<dc:creator>psmay</dc:creator>
				<category><![CDATA[Concept]]></category>
		<category><![CDATA[Electronics]]></category>

		<guid isPermaLink="false">http://psmay.com/?p=506</guid>
		<description><![CDATA[The circuit described here triggers three (or an arbitrary number) monostables with differing but related widths. What&#8217;s different about this one than others I&#8217;ve seen is that this circuit has only one timing signal; in particular, there is only one RC network among all, which could potentially reduce the parts count and, more importantly, increase &#8230;<p><a href="http://psmay.com/2012/01/23/multi-shot-multiple-monostables-on-one-trigger/" class="more-link">Read More</a></p>]]></description>
			<content:encoded><![CDATA[<div id="attachment_507" class="wp-caption aligncenter" style="width: 310px"><a href="http://psmay.com/wp-content/uploads/2012/01/three-shot.png"><img class="size-medium wp-image-507" title="three-shot" src="http://psmay.com/wp-content/uploads/2012/01/three-shot-300x145.png" alt="" width="300" height="145" /></a><p class="wp-caption-text">This circuit provides a pulse-sequencing capability using the control voltage inputs of the 555.</p></div>
<p>The circuit described here triggers three (or an arbitrary number) monostables with differing but related widths. What&#8217;s different about this one than others I&#8217;ve seen is that this circuit has only one timing signal; in particular, there is only one RC network among all, which could potentially reduce the parts count and, more importantly, increase consistency among the timers.</p>
<p>The timing network is actually sort of a modified RC using a transistor and a voltage reference to charge the capacitor with a constant current. The timing is determined by the base voltage of the PNP transistor, the resistance at the emitter resistance, and the capacitance at the collector. The voltage drop across the resistor is the V<sub>cc</sub> &#8211; V<sub>b</sub> + V<sub>eb</sub><sup>[<a href="#multi-shot-multiple-monostables-on-one-trigger-n-1" class="footnoted" id="to-multi-shot-multiple-monostables-on-one-trigger-n-1">1</a>]</sup>. As long as none of these three values vary significantly in the application, the resistor&#8217;s voltage drop can be considered constant. If the resistor is, as expected, also constant, then the current through it is constant as well: I = V/R. The transistor will adjust as necessary, if possible, to maintain that current through the transistor<sup>[<a href="#multi-shot-multiple-monostables-on-one-trigger-n-2" class="footnoted" id="to-multi-shot-multiple-monostables-on-one-trigger-n-2">2</a>]</sup>. If the supply voltage is well regulated, the base voltage can be set with a voltage divider.</p>
<p>The output of this constant current timing network, in contrast to the tricky curve of a regular RC network, is a linear ramp. This makes it easier to calculate the desired control voltage for each monostable. In the example above, the control voltages are 1V, 2V, and 3V, where the 1V and 2V timers produce a pulse exactly 1/3 and 2/3, respectively, the width of the 3V timer pulse. The values need not be this regular. A normal RC network could be substituted if you&#8217;re willing to do the math.</p>
<p>The monostable with the longest delay should have its discharge pin connected with its threshold pin in order to discharge the capacitor.</p>
<p>This approach gets a little unfortunate where setting the control voltages comes in. The CV is preset internally with a three-step resistor divider network. The CV itself is roughly 5k from V<sub>cc</sub> and roughly 10k from ground. If I&#8217;ve done the math correctly, this is equivalent to a 2Vcc/3 supply through a 3.3k resistance. This means that you can&#8217;t trivially set the control voltage with a divider—something with a low (ideally zero) output resistance is necessary. Here are some things that might be worth trying:</p>
<ul>
<li>Resistor divider with proper buffer (2 resistors, 1/4 to 1 op amp IC). If you&#8217;re not willing to complicate the calculations, an op amp can output the same voltage as the input, with no base-emitter drop. As a bonus, it&#8217;s an op amp, which is <a title="Analog Computation" href="http://psmay.com/2012/01/09/analog-computation/">capable of a whole lot more</a>. If restricted to Radio Shack, I&#8217;d pick up two TL082 JFET dual amps (or an LM324 quad if they&#8217;re out), then use three of the amps with a resistor ladder to set CVs and the one left over to upgrade the current source. I&#8217;d guess this is the option that would involve the least hair-pulling. (Edit: <a href="http://www.falstad.com/circuit/#%24+3+5.0E-6+6.724437240923179+58+7.0+50%0Aa+208+128+248+128+3+12.0+0.0+1000000.0%0AR+208+120+160+120+0+0+40.0+5.0+0.0+0.0+0.5%0Aw+208+136+208+152+0%0Ag+272+528+272+544+0%0Ar+272+208+272+272+0+10000.0%0Aw+248+128+272+128+0%0Aw+304+464+272+464+0%0Ax+150+105+275+108+0+12+Simulated+5V+regulator%0Aw+248+128+248+152+0%0Aw+248+152+208+152+0%0Ar+272+272+272+336+0+10000.0%0Ar+272+336+272+400+0+10000.0%0Ar+272+400+272+464+0+10000.0%0Ar+272+464+272+528+0+10000.0%0Aa+304+472+384+472+3+5.0+0.0+1000000.0%0Ar+304+504+384+504+0+8000.0%0Aw+304+480+304+504+0%0Aw+384+472+384+504+0%0Ar+304+232+384+232+0+8000.0%0Aw+384+344+384+376+0%0Aw+304+352+304+376+0%0Ar+304+376+384+376+0+12000.0%0Aa+304+344+384+344+3+5.0+0.0+1000000.0%0Aw+304+336+272+336+0%0Aw+304+400+272+400+0%0Aa+304+408+384+408+3+5.0+0.0+1000000.0%0Ar+304+440+384+440+0+12000.0%0Aw+304+416+304+440+0%0Aw+384+408+384+440+0%0AO+384+344+432+344+1%0AO+384+408+432+408+1%0AO+384+472+432+472+1%0Aw+272+128+480+128+0%0Aw+272+128+272+208+0%0Aw+272+272+304+272+0%0AO+480+248+552+248+1%0Aw+384+264+448+264+0%0Aw+304+256+304+232+0%0Aw+384+232+480+232+0%0Aw+480+232+480+248+0%0Aw+480+280+480+336+1%0Ar+480+128+480+232+0+1000.0%0At+448+264+480+264+0+-1+-0.5924804888732629+-0.5927292471458645+100.0%0AO+480+280+552+280+1%0Aa+304+264+384+264+2+5.0+0.0+1000000.0%0Ac+480+336+480+416+0+4.7E-6+3.999677170160579%0Aw+272+528+480+528+0%0Aw+480+528+480+416+0%0At+600+352+576+352+0+1+-3.999677170110579+4.999999999801981E-11+100.0%0Aw+480+528+576+528+0%0Aw+576+528+576+368+0%0Ar+600+352+648+352+0+1000.0%0AL+648+352+672+352+0+0+true+5.0+0.0%0Aw+480+336+576+336+0%0Ax+606+380+686+383+0+12+Discharge+cap%0Ax+170+236+256+239+0+12+1%3A1%3A1%3A1%3A1+divider%0Ax+310+550+382+553+0+12+8k+%3D+10k%7C%7C40k%0Ax+307+565+386+568+0+12+12k+%3D+20k%7C%7C30k%0Ax+378+332+463+335+0+12+Voltage+outputs%0Ax+544+305+622+308+0+12+Current+output%0Ax+544+319+589+322+0+12+Apx+Vr%2FR%0Ao+45+64+0+35+5.0+0.8+0+-1%0A">An example of a buffered resistor divider, complete with redone current source, in terms of a 7805 voltage regulator.</a> Would require a supply voltage above 7 volts or so, but it&#8217;s an easy out in 2-3 ICs and about 10 resistors, plus the transistor and RC already in the circuit.)</li>
<li>Resistor divider with unity gain transistor (2 resistors, 1 NPN transistor). Similarly to the current source, the emitter voltage is a nearly fixed drop below the base voltage.</li>
<li>Trimmer (1 potentiometer, potentially up to 2 biasing resistors) if you&#8217;re okay with a bit of tuning.</li>
<li>Linear voltage regulators/references. Would probably work really well, but might be expensive depending on where you buy<sup>[<a href="#multi-shot-multiple-monostables-on-one-trigger-n-3" class="footnoted" id="to-multi-shot-multiple-monostables-on-one-trigger-n-3">3</a>]</sup> and in this case requires a fairly small one (probably around 1V). The LM317 can be treated as a precision 1.25V drop, as long as the minimum load requirement is met.</li>
<li>Diode drops (1 diode). In the simulator, I was able to get the circuit to work with a ladder of diode drops for the control voltages (i.e., around 0.7, 1.4, and 2.1V). I&#8217;ve read that in practice this doesn&#8217;t work nearly as well.</li>
</ul>
<p>By the way, the intended purpose is to trigger some D flip-flops to read serial data in an experimental line encoding I&#8217;ve conceived. It&#8217;s a variation of <a title="Nice coding. Has it got a name?" href="http://psmay.com/2011/10/07/nice-coding-has-it-got-a-name/">one I discussed way back</a>, but the initial rising edge is followed by three bits of data before the mandatory fall. If it works, it could mean a simple output interface for PCs (e.g. via monitor or sound card) to devices that only understand data in terms of data, clock, and latch. What does this mean? You guessed it—semi-headless 74HC595 displays. (Okay, maybe not so much, but that&#8217;d at least be a good way to test it.)</p>
<p><a href="http://www.falstad.com/circuit/#%24+1+5.0E-6+10.20027730826997+50+5.0+50%0A165+416+208+80+192+2+0.0%0Ag+288+416+288+480+0%0AR+480+128+480+80+0+0+40.0+5.0+0.0+0.0+0.5%0At+240+224+288+224+0+-1+3.9998870467395293+-0.46381087494305273+100.0%0Ar+288+208+288+128+0+47000.0%0Aw+288+128+480+128+0%0Aw+416+240+384+240+0%0Aw+384+240+384+336+0%0Aw+384+336+416+336+0%0Aw+288+240+352+240+0%0Ac+288+240+288+288+0+1.0000000000000001E-7+1.129532604706071E-4%0Aw+480+128+544+128+0%0Aw+544+128+544+240+0%0AR+240+224+160+224+0+0+40.0+4.0+0.0+0.0+0.5%0AL+144+304+112+304+0+0+true+5.0+0.0%0Aw+240+304+416+304+0%0AI+144+304+240+304+0+0.5%0A165+624+208+640+208+2+0.0%0Aw+240+304+240+384+0%0Aw+240+384+576+384+0%0Aw+576+384+576+304+0%0Aw+576+304+624+304+0%0Aw+384+336+384+400+0%0Aw+384+400+624+400+0%0Aw+624+400+624+336+0%0Aw+688+128+752+128+0%0Aw+752+176+752+240+0%0Aw+688+128+544+128+0%0AR+688+368+688+480+0+0+40.0+2.0+0.0+0.0+0.5%0A165+832+208+848+208+2+0.0%0Aw+752+128+896+128+0%0Aw+960+240+960+176+0%0Aw+960+128+896+128+0%0Aw+832+304+784+304+0%0Aw+784+304+784+384+0%0Aw+784+384+576+384+0%0Aw+624+400+832+400+0%0Aw+832+400+832+336+0%0AR+896+368+896+480+0+0+40.0+1.0+0.0+0.0+0.5%0Aw+480+128+480+176+0%0Aw+688+128+688+176+0%0Aw+752+128+752+176+0%0Aw+896+128+896+176+0%0Aw+960+128+960+176+0%0Aw+288+288+288+416+0%0AR+480+368+480+480+0+0+40.0+3.0+0.0+0.0+0.5%0Aw+352+240+384+240+0%0AM+544+272+544+352+0+2.5%0AM+752+272+752+352+0+2.5%0AM+960+272+960+352+0+2.5%0AO+352+240+352+192+0%0Ao+50+64+0+34+3.0517578125E-4+9.765625E-5+0+-1%0Ao+47+64+0+34+7.62939453125E-5+9.765625E-5+0+-1%0Ao+48+64+0+34+7.62939453125E-5+9.765625E-5+0+-1%0Ao+49+64+0+34+7.62939453125E-5+9.765625E-5+0+-1%0A">This circuit is available on the Falstad simulator.</a></p>

<ol class="footnotes">
	<li class="footnote" id="multi-shot-multiple-monostables-on-one-trigger-n-1"><strong><sup>[1]</sup></strong> V<sub>eb</sub> may vary slightly depending on current, but is roughly 0.7V under normal circumstances. <a class="note-return" href="#to-multi-shot-multiple-monostables-on-one-trigger-n-1">&#x21A9;</a></li>
	<li class="footnote" id="multi-shot-multiple-monostables-on-one-trigger-n-2"><strong><sup>[2]</sup></strong> Up to near the max collector voltage, in this case slightly lower than the emitter voltage. <a class="note-return" href="#to-multi-shot-multiple-monostables-on-one-trigger-n-2">&#x21A9;</a></li>
	<li class="footnote" id="multi-shot-multiple-monostables-on-one-trigger-n-3"><strong><sup>[3]</sup></strong> LM317 is $3 at Radio Shack, but way cheaper online, especially in a TO-92 package. <a class="note-return" href="#to-multi-shot-multiple-monostables-on-one-trigger-n-3">&#x21A9;</a></li></ol>
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		<title>Papercraft Logic Octahedron</title>
		<link>http://psmay.com/2012/01/13/papercraft-logic-octahedron/</link>
		<comments>http://psmay.com/2012/01/13/papercraft-logic-octahedron/#comments</comments>
		<pubDate>Fri, 13 Jan 2012 20:05:32 +0000</pubDate>
		<dc:creator>psmay</dc:creator>
				<category><![CDATA[Non sequitur]]></category>

		<guid isPermaLink="false">http://psmay.com/?p=498</guid>
		<description><![CDATA[Print your own, if you&#8217;d like! This octahedral toy/tool/thing represents manipulations on a logic gate with two inputs A and B and one output Y. A face of the object says what operation it executes, such as &#8220;AND&#8221;. From there, each side of the face is marked with a variable—A, B, or Y—and rotating past &#8230;<p><a href="http://psmay.com/2012/01/13/papercraft-logic-octahedron/" class="more-link">Read More</a></p>]]></description>
			<content:encoded><![CDATA[<div id="attachment_497" class="wp-caption aligncenter" style="width: 310px"><a href="http://psmay.com/wp-content/uploads/2012/01/wpid-011312150504.jpg"><img class="size-medium wp-image-497" title="wpid-011312150504.jpg" src="http://psmay.com/wp-content/uploads/2012/01/wpid-011312150504-300x262.jpg" alt="" width="300" height="262" /></a><p class="wp-caption-text">Almost as fun as it looks.</p></div>
<p><a href="/wp-content/uploads/2012/01/logihedron.pdf">Print your own, if you&#8217;d like!</a></p>
<p>This octahedral toy/tool/thing represents manipulations on a logic gate with two inputs A and B and one output Y. A face of the object says what operation it executes, such as &#8220;AND&#8221;. From there, each side of the face is marked with a variable—A, B, or Y—and rotating past that edge shows you the result of inverting that variable.</p>
<p>For example, if I start at AND, I might turn past Y to NAND (AND with inverted output). Then, I might turn past A to IF (another name for OR NOT), because that&#8217;s what /A NAND B is. Finally, I might turn past B to OR, since that&#8217;s A OR NOT /B.</p>
<p>Alternatively, you might choose a starting point and an ending point, then trace the path between them to determine how many inverters are necessary to do the conversion.</p>
<p>Note that any face is at most three turns from any other. Polar opposites such as AND and OR are on opposite faces, and changing one to the other involves inverting each input and the output.</p>
<p>The somewhat uncommon logical operator names IMP (short for IMPLIES), NIMP, IF, and NIF appear as one-word substitutes for operations that invert B (NAND NOT, AND NOT, OR NOT, and NOR NOT, respectively). The two-word versions appear as a subtitle.</p>
<p>This isn&#8217;t quite as great as it could be. The text sizes and layout need a lot of work; the expression text is only barely big enough to read. However, since the time may never come for improvement, here it is for you to play with.</p>
<p>Enjoy!</p>

]]></content:encoded>
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		<title>More 555 logic (plus 3 555 timers into a active-low-gated not-D latch)</title>
		<link>http://psmay.com/2012/01/12/more-555-logic-plus-3-555-timers-into-a-active-low-gated-not-d-latch/</link>
		<comments>http://psmay.com/2012/01/12/more-555-logic-plus-3-555-timers-into-a-active-low-gated-not-d-latch/#comments</comments>
		<pubDate>Thu, 12 Jan 2012 21:55:28 +0000</pubDate>
		<dc:creator>psmay</dc:creator>
				<category><![CDATA[Non sequitur]]></category>

		<guid isPermaLink="false">http://psmay.com/?p=463</guid>
		<description><![CDATA[Yesterday&#8217;s post got me thinking way too hard about the ubiquitous 555 timer. Specifically, I wondered if I might have been missing an optimization that would knock out one of the 555s necessary to make the transparent latch. It turns out that I was right, provided that an active-low enable line is doable. (Details follow.) &#8230;<p><a href="http://psmay.com/2012/01/12/more-555-logic-plus-3-555-timers-into-a-active-low-gated-not-d-latch/" class="more-link">Read More</a></p>]]></description>
			<content:encoded><![CDATA[<p><a title="Concept: Four 555 timers into a gated D latch" href="http://psmay.com/2012/01/11/concept-four-555-timers-into-a-gated-d-latch/">Yesterday&#8217;s post</a> got me thinking way too hard about the ubiquitous 555 timer. Specifically, I wondered if I might have been missing an optimization that would knock out one of the 555s necessary to make the transparent latch. It turns out that I was right, provided that an active-low enable line is doable. (Details follow.)</p>
<p>Skip this bit if analog creeps you out: The 555 timer has some analog circuitry that seems to be used in the majority of its applications. There is a control voltage (CV) pin that sets thresholds for comparators at the TH (threshold) and /TR (trigger) pins. If TH is above CV, then it registers as high (low otherwise); if /TR is below CV/2, then it registers as low (high otherwise). CV can be set externally<sup>[<a href="#more-555-logic-plus-3-555-timers-into-a-active-low-gated-not-d-latch-n-1" class="footnoted" id="to-more-555-logic-plus-3-555-timers-into-a-active-low-gated-not-d-latch-n-1">1</a>]</sup>, but usually it&#8217;s left alone, and its default setting is CV = 2V<sub>cc</sub>/3 (making CV/2 = V<sub>cc</sub>/3).</p>
<p>Really, that&#8217;s where the analog part ends. The rest is basically digital, and digital is far more comfortable for those of us from the computer side of the house. The 555 timer is basically an RS latch with mildly analog inputs, plus a preemptive additional reset (/RST). I realized that&#8217;s still vague for my taste, so I scribbled out a bunch of notes, drew up some tables, and eventually came up with the following logical equivalent of the 555:</p>
<div id="attachment_488" class="wp-caption aligncenter" style="width: 555px"><a href="http://psmay.com/wp-content/uploads/2012/01/555-logic.png"><img class="size-large wp-image-488" title="555-logic" src="http://psmay.com/wp-content/uploads/2012/01/555-logic-1024x463.png" alt="" width="545" height="246" /></a><p class="wp-caption-text">Even if you ignore for a moment the tweakable threshold voltage settings on the threshold and trigger inputs, the 555 has interesting possibilities as a digital circuit.</p></div>
<p>(Edit: <a href="http://www.falstad.com/circuit/#%24+1+5.0E-6+10.20027730826997+50+5.0+50%0A165+336+208+368+208+2+0.0%0AM+464+272+528+272+0+2.5%0Ax+502+261+516+265+0+18+Q%0AL+224+160+176+160+0+0+true+5.0+0.0%0AL+224+272+176+272+0+1+false+5.0+0.0%0AL+224+336+176+336+0+1+false+5.0+0.0%0Ax+202+72+479+78+1+24+555+as+R+and%2For+RS+Latch%0AR+400+176+400+96+0+0+40.0+5.0+0.0+0.0+0.5%0Ax+191+328+204+332+0+18+R%0Ax+187+152+210+156+0+18+Rp%0Ax+190+264+202+268+0+18+S%0Aw+336+336+224+336+0%0AI+224+272+288+272+0+0.5%0AI+224+160+288+160+0+0.5%0Aw+336+272+336+304+0%0Ax+293+263+305+267+2+18+S%0Ax+186+192+288+195+0+12+Rp+%3D+R+with+priority%0Ax+294+152+317+156+2+18+Rp%0Aw+288+160+464+160+0%0Aw+464+160+464+240+0%0Aw+336+272+288+272+0%0A">A demonstration of the above on Falstad.</a>)</p>
<p>The chip has three logical inputs. One, /RST, is a legitimate TTL input that is inverted. The others feed into comparators as just described, but ignoring the level details, TH simply feeds into a buffer and /TR pin feeds into an inverter. There are also two outputs, OUT (output) and DIS (discharge) pin. Both carry the same data, but OUT is driven as a logic level while DIS is open-collector<sup>[<a href="#more-555-logic-plus-3-555-timers-into-a-active-low-gated-not-d-latch-n-2" class="footnoted" id="to-more-555-logic-plus-3-555-timers-into-a-active-low-gated-not-d-latch-n-2">2</a>]</sup>.</p>
<p>If you ignore the /RST, the 555 is an R-/S latch, where TH and /TR pins serve as R and /S, respectively. If both of those signals are active, the result is by definition undefined.</p>
<p>/RST adds to this an overriding additional reset signal. When active, the output is defined as low even if /TRis also active.</p>
<p>By extracting the behavior of a plain RS latch from this, the relationship among the inputs is clarified:</p>
<ul>
<li>The latch is set if /TR is low and /RSTis high.</li>
<li>The latch is reset if THis high, /RSTis low, or both.</li>
</ul>
<p>Some degenerate cases:</p>
<ul>
<li>As noted before, if /RST is high then TH and /TR form an R-/S latch.</li>
<li>If TH is low, then /RST and /TR form a kind of R latch<sup>[<a href="#more-555-logic-plus-3-555-timers-into-a-active-low-gated-not-d-latch-n-3" class="footnoted" id="to-more-555-logic-plus-3-555-timers-into-a-active-low-gated-not-d-latch-n-3">3</a>]</sup>, with /RST and /TR as /R and /S, respectively.</li>
<li>If TH and /TR are tied together as a single input, and /RST is used as another input, the result is an &#8220;AND NOT&#8221; logic gate, with TH+/TR as the inverting input and /RST as the non-inverting input.</li>
<ul>
<li>The inverting input is effectively Schmitt-triggered, with the hysteresis zone set between CV/2 and CV. (/RST remains a normal TTL input.)</li>
<li>With /RST tied high, this becomes a Schmitt-triggered inverter.</li>
</ul>
</ul>
<p>Of particular interest is the R latch. This particular latch is set when /TR is low and /RST is high. On the other hand, this latch is reset when /RST is low with no other condition. When I saw this it seemed a bit familiar, like /RST being high <em>enables</em> the value of /TR having any impact.</p>
<p>So, I prepared a truth table for the D and E lines of a D latch, and entered the corresponding values of /R and /S. The result: /S = /E, and /R = D or /E.</p>
<p>My first conclusion is that, if you&#8217;re not bound to using only 555 elements, this could make things a lot easier. It requires an active-low /E, if that can&#8217;t be accomplished anywhere else, an NPN inverter (one transistor, two resistors) will suffice. /E is fed directly into /S, and a diode-logic OR gate (2 Schottky diodes, one resistor) figures /R. Even with the inverter that&#8217;s way fewer parts than yesterday&#8217;s solution.</p>
<div id="attachment_494" class="wp-caption aligncenter" style="width: 610px"><a href="http://psmay.com/wp-content/uploads/2012/01/wpid-0112121641561.jpg"><img class="size-full wp-image-494 " title="wpid-011212164156" src="http://psmay.com/wp-content/uploads/2012/01/wpid-0112121641561.jpg" alt="" width="600" height="440" /></a><p class="wp-caption-text">In four parts, a D latch with active-low enable. Slap an inverter (also pictured) onto the front to make it a normal enable.</p></div>
<p>(Edit: <a href="http://www.falstad.com/circuit/#%24+1+5.0E-6+10.20027730826997+50+5.0+50%0Ad+240+176+320+176+1+0.805904783%0Ad+240+208+320+208+1+0.805904783%0AL+160+176+128+176+0+0+false+5.0+0.0%0AL+160+208+128+208+0+0+false+5.0+0.0%0Ar+320+208+320+272+0+10000.0%0Aw+320+176+320+208+0%0A165+368+208+416+208+2+0.0%0AM+496+272+544+272+0+2.5%0AR+432+176+432+96+0+0+40.0+5.0+0.0+0.0+0.5%0Aw+320+176+496+176+0%0Aw+496+176+496+240+0%0Aw+240+208+240+304+0%0Aw+368+336+368+368+0%0Ag+368+368+368+400+0%0AI+160+208+240+208+0+0.5%0Aw+240+176+160+176+0%0Aw+240+304+368+304+0%0Aw+368+368+320+368+0%0Ax+142+164+155+168+0+18+D%0Ax+144+233+156+237+0+18+E%0Ax+222+234+234+238+2+18+E%0Ax+149+69+532+75+1+24+555+D+Latch+with+Active-Low+Enable%0Ax+516+265+530+269+0+18+Q%0Ax+283+161+354+164+0+12+DL+OR+gate%0Aw+320+368+320+272+0%0A">A demonstration of the above on Falstad.</a>)</p>
<p>Translating the setup to all 555s is trickier. If you can set up for active-low both /E and /D, it&#8217;s possible to get it down to three elements: The latch, an inverter into /R, and an AND NOT gate. This follows from the proposition that R = /D and E = /D and not /E. Then, /R = not R. And, of course, for active-high D you add an inverter—4 elements, no better than yesterday.</p>
<p>The difficulty is that the only gate a single 555 can simulate (other than an inverter) is an AND NOT. While it&#8217;s possible to make any other gate from AND NOT parts, some take more fudging than others. To make the OR gate we&#8217;d like, you need three. My derivation<sup>[<a href="#more-555-logic-plus-3-555-timers-into-a-active-low-gated-not-d-latch-n-4" class="footnoted" id="to-more-555-logic-plus-3-555-timers-into-a-active-low-gated-not-d-latch-n-4">4</a>]</sup> is as follows:</p>
<ul>
<li>A OR B</li>
<li>NOT (A NOR B)</li>
<li>NOT ((NOT A) AND NOT B)</li>
<li>NOT ((1 AND NOT A) AND NOT B)</li>
<li>1 AND NOT ((1 AND NOT A) AND NOT B)</li>
</ul>
<p>Note that in the last stage there are three &#8220;AND NOT&#8221;s and no other operators. Note also that, using (Schottky) diode logic, the parts count is the same: Two diodes and one resistor. Guess which one I&#8217;d rather breadboard.</p>

<ol class="footnotes">
	<li class="footnote" id="more-555-logic-plus-3-555-timers-into-a-active-low-gated-not-d-latch-n-1"><strong><sup>[1]</sup></strong> Its default value comes from a resistive divider of approximately 5K vs. 10K, so if the value is critical it&#8217;s probably better to set it via a lower impedance, such as with a voltage reference or a (unity gain) buffer. <a class="note-return" href="#to-more-555-logic-plus-3-555-timers-into-a-active-low-gated-not-d-latch-n-1">&#x21A9;</a></li>
	<li class="footnote" id="more-555-logic-plus-3-555-timers-into-a-active-low-gated-not-d-latch-n-2"><strong><sup>[2]</sup></strong> 0V on low, high-impedance on high. <a class="note-return" href="#to-more-555-logic-plus-3-555-timers-into-a-active-low-gated-not-d-latch-n-2">&#x21A9;</a></li>
	<li class="footnote" id="more-555-logic-plus-3-555-timers-into-a-active-low-gated-not-d-latch-n-3"><strong><sup>[3]</sup></strong> An RS latch that favors R in a tie <a class="note-return" href="#to-more-555-logic-plus-3-555-timers-into-a-active-low-gated-not-d-latch-n-3">&#x21A9;</a></li>
	<li class="footnote" id="more-555-logic-plus-3-555-timers-into-a-active-low-gated-not-d-latch-n-4"><strong><sup>[4]</sup></strong> Through repeated application of <a href="http://en.wikipedia.org/wiki/De_Morgan%27s_laws">DeMorgan&#8217;s laws.</a> <a class="note-return" href="#to-more-555-logic-plus-3-555-timers-into-a-active-low-gated-not-d-latch-n-4">&#x21A9;</a></li></ol>
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		<title>Concept: Four 555 timers into a gated D latch</title>
		<link>http://psmay.com/2012/01/11/concept-four-555-timers-into-a-gated-d-latch/</link>
		<comments>http://psmay.com/2012/01/11/concept-four-555-timers-into-a-gated-d-latch/#comments</comments>
		<pubDate>Thu, 12 Jan 2012 02:43:51 +0000</pubDate>
		<dc:creator>psmay</dc:creator>
				<category><![CDATA[Concept]]></category>
		<category><![CDATA[Electronics]]></category>

		<guid isPermaLink="false">http://psmay.com/?p=455</guid>
		<description><![CDATA[Today, figured out how to make a (possibly low-speed) transparent D latch out of an R-/S latch, plus a couple of logic gates, and an inverter. Each of these four things can be constructed from a 555 timer (or half of a 556). Alternatively, each of the gates can be replaced by three diodes and &#8230;<p><a href="http://psmay.com/2012/01/11/concept-four-555-timers-into-a-gated-d-latch/" class="more-link">Read More</a></p>]]></description>
			<content:encoded><![CDATA[<div id="attachment_454" class="wp-caption aligncenter" style="width: 555px"><a href="http://psmay.com/wp-content/uploads/2012/01/wpid-011112214121.jpg"><img class="size-large wp-image-454" title="wpid-011112214121.jpg" src="http://psmay.com/wp-content/uploads/2012/01/wpid-011112214121-1024x803.jpg" alt="" width="545" height="427" /></a><p class="wp-caption-text">No guarantees, but it worked in the simulator.</p></div>
<p>Today, figured out how to make a (possibly low-speed) transparent D latch out of an R-/S latch, plus a couple of logic gates, and an inverter. Each of these four things can be constructed from a 555 timer (or half of a 556). Alternatively, each of the gates can be replaced by three diodes<sup>[<a href="#concept-four-555-timers-into-a-gated-d-latch-n-1" class="footnoted" id="to-concept-four-555-timers-into-a-gated-d-latch-n-1">1</a>]</sup> and a resistor, and the inverter by an NPN transistor and a resistor. Not pictured is the AC coupling<sup>[<a href="#concept-four-555-timers-into-a-gated-d-latch-n-2" class="footnoted" id="to-concept-four-555-timers-into-a-gated-d-latch-n-2">2</a>]</sup> on the E input that would make this an edge-triggered flip-flop instead of a latch.</p>
<p>The significance of this is that a D flip-flop, a 1-bit static RAM and an important element of sequential logic, can be constructed very easily with stuff readily available from Radio Shack, which doesn&#8217;t stock logic ICs anymore but does carry 555s and 556s (as well as diodes, resistors, and transistors). Naturally, I have the best interests of the impatient experimenter in mind. :-)</p>

<ol class="footnotes">
	<li class="footnote" id="concept-four-555-timers-into-a-gated-d-latch-n-1"><strong><sup>[1]</sup></strong> With Schottky diodes you could probably get away with omitting the output diode. <a class="note-return" href="#to-concept-four-555-timers-into-a-gated-d-latch-n-1">&#x21A9;</a></li>
	<li class="footnote" id="concept-four-555-timers-into-a-gated-d-latch-n-2"><strong><sup>[2]</sup></strong> In this case, an <a href="http://en.wikipedia.org/wiki/File:High_pass_filter.svg">RC highpass</a> is used, an inline capacitor of about 0.1µF followed by a 10kΩ pull-down resistor. <a class="note-return" href="#to-concept-four-555-timers-into-a-gated-d-latch-n-2">&#x21A9;</a></li></ol>
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		<title>Analog Computation</title>
		<link>http://psmay.com/2012/01/09/analog-computation/</link>
		<comments>http://psmay.com/2012/01/09/analog-computation/#comments</comments>
		<pubDate>Mon, 09 Jan 2012 19:41:10 +0000</pubDate>
		<dc:creator>psmay</dc:creator>
				<category><![CDATA[Non sequitur]]></category>

		<guid isPermaLink="false">http://psmay.com/?p=450</guid>
		<description><![CDATA[Younger hobbyists who want to do arithmetic in an electronics application may think that a microcontroller is the only way to do it. I present something far more old-school. If you can represent the scalar terms of an arithmetic expression as voltages and/or resistances, then many operations can be performed with op amps (which is, &#8230;<p><a href="http://psmay.com/2012/01/09/analog-computation/" class="more-link">Read More</a></p>]]></description>
			<content:encoded><![CDATA[<p>Younger hobbyists who want to do arithmetic in an electronics application may think that a microcontroller is the only way to do it. I present something far more old-school.</p>
<div class="wp-caption aligncenter" style="width: 348px"><img style="display: block;" src="http://psmay.com/wp-content/uploads/2012/01/wpid-2012-01-06_17-02-10_332.jpg" alt="image" width="338" height="600" /><p class="wp-caption-text">How to do simple math on real numbers in a very non-digital way.</p></div>
<p>If you can represent the scalar terms of an arithmetic expression as voltages and/or resistances, then many operations can be performed with op amps (which is, incidentally, what the &#8220;op&#8221; part means). Several of the major features are described above.</p>
<ul>
<li>The word &#8220;amp&#8221;, for <strong>amplifier</strong>, refers to the fact that the device amplifies, or enlarges, an input signal by a factor called <strong>gain</strong> which is represented by the letter <var>A</var><sup>[<a href="#analog-computation-n-1" class="footnoted" id="to-analog-computation-n-1">1</a>]</sup> When <var>A</var> is fixed, the amplifier serves to multiply the input signal by <var>A</var>. By default, <var>A</var> is ideally infinite<sup>[<a href="#analog-computation-n-2" class="footnoted" id="to-analog-computation-n-2">2</a>]</sup>, but can be set to a fixed value using resistors.</li>
<li>Division (not pictured) can be performed using a resistor divider network. No op amp is required, though using one might be desirable to avoid loading effects.</li>
<li>&#8220;Subtract then multiply by <var>A</var> &gt; 0&#8243;: An op amp&#8217;s natural mode (in my opinion, anyway) is the <strong>differential amplifier</strong>. Two voltages are input; <var>V<sub>2</sub></var> is subtracted from <var>V<sub>1</sub></var>, and then the difference is multiplied by <var>A</var>, which is based on the ratios of resistors used. All other linear modes pictured can be described in terms of this one:</li>
<ul>
<li>&#8220;Multiply by <var>A</var> &gt;= 1&#8243;: If you take the divider off of <var>V<sub>2</sub></var> and replace it with <var>V<sub>in</sub></var>, it&#8217;s equivalent to setting <var>V<sub>2</sub></var> to <var>V<sub>in</sub></var>(1 + <var>R<sub>in</sub></var>/<var>R<sub>F</sub></var>). Then, just set <var>V<sub>1</sub></var> to 0. The result is <var>A</var>(<var>V<sub>2</sub></var> &#8211; <var>V<sub>1</sub></var>) = (<var>R<sub>F</sub></var>/<var>R<sub>in</sub></var>)<var>V<sub>in</sub></var>(1 + <var>R<sub>in</sub></var>/<var>R<sub>F</sub></var>) = <var>V<sub>in</sub></var>(1 + <var>R<sub>F</sub></var>/<var>R<sub>in</sub></var>).</li>
<li>&#8220;Multiply by <var>A</var> &lt; 0&#8243;: Let <var>V<sub>2</sub></var> = 0, <var>V<sub>1</sub></var> = <var>V<sub>in</sub></var>. The result is <var>A</var>(<var>V<sub>2</sub></var> &#8211; <var>V<sub>1</sub></var>) = (<var>R<sub>F</sub></var>/<var>R<sub>in</sub></var>)(0 &#8211; <var>V<sub>in</sub></var>) = <var>V<sub>in</sub></var>(-<var>R<sub>F</sub></var>/<var>R<sub>in</sub></var>).</li>
<li>&#8220;Add then multiply by <var>A</var> &lt; 0&#8243;: Exactly the same as the previous case, except that the input is from a resistor divider network. If <var>V<sub>1</sub></var> and <var>V<sub>2</sub></var> are fed to the same point through equal resistances as shown, it&#8217;s equivalent to a single input of <var>V<sub>X</sub></var> = (<var>V<sub>1</sub></var> + <var>V<sub>2</sub></var>)/2 through a resistance of <var>R<sub>X</sub></var> = <var>R<sub>in</sub></var>/2. With the other input at 0, the result is <var>A</var>(0 &#8211; <var>V<sub>X</sub></var>) = (<var>R<sub>F</sub></var>/<var>R<sub>X</sub></var>)(-<var>V<sub>X</sub></var>) = -(2<var>R<sub>F</sub></var>/<var>R<sub>in</sub></var>)((<var>V<sub>1</sub></var> + <var>V<sub>2</sub></var>)/2) = -(<var>R<sub>F</sub></var>/<var>R<sub>in</sub></var>)(<var>V<sub>1</sub></var> + <var>V<sub>2</sub></var>).</li>
</ul>
<li>&#8220;Logarithmic&#8221; and &#8220;Exponential&#8221;: An NPN transistor with a grounded base can be placed either at the feedback or the input to implement a logarithmic or exponential output, respectively. The coefficients of the expression are not well defined, since they vary from instance to instance, but if the transistors used are closely matched and thermally linked (for example, in a single-chip transistor array) then with some tuning their outputs will be consistent. A log transform can be used to easily multiply (by adding logarithms) or divide (by subtracting logarithms) two voltages.</li>
<li>Comparison (not pictured): As discussed here previously, a comparator is a sort of op amp specialized to output only logical high/low depending on whether the value at the non-inverting input is higher than the value of the inverting input, outputting high and low, respectively. In a pinch, an op amp will do the same thing in the <strong>open-loop</strong> configuration—direct inputs and no feedback, resulting in the extremely high gain mentioned earlier. If the non-inverting input is even slightly different than the inverting input, that small difference is amplified so immensely that the output will be either the highest possible or the lowest possible, meaning around the positive and negative supply voltages, respectively. Use of an actual comparator is preferred though, since it is better tuned for digital use.</li>
</ul>

<ol class="footnotes">
	<li class="footnote" id="analog-computation-n-1"><strong><sup>[1]</sup></strong> The &#8220;A&#8221; presumably refers to &#8220;amplification&#8221;. <a class="note-return" href="#to-analog-computation-n-1">&#x21A9;</a></li>
	<li class="footnote" id="analog-computation-n-2"><strong><sup>[2]</sup></strong> But in practice is just a very high number. <a class="note-return" href="#to-analog-computation-n-2">&#x21A9;</a></li></ol>
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		<title>Concept: Push and Pull</title>
		<link>http://psmay.com/2012/01/03/concept-push-and-pull/</link>
		<comments>http://psmay.com/2012/01/03/concept-push-and-pull/#comments</comments>
		<pubDate>Wed, 04 Jan 2012 02:56:46 +0000</pubDate>
		<dc:creator>psmay</dc:creator>
				<category><![CDATA[Concept]]></category>
		<category><![CDATA[Electronics]]></category>

		<guid isPermaLink="false">http://psmay.com/?p=445</guid>
		<description><![CDATA[I contrived a diode-transistor logic (DTL) circuit for a SR latch with a CMOS push-pull output and a break-before-make mechanism to prevent simultaneous push and pull (shoot-through). I have no idea whether it actually works and there are probably easier ways to do it, but it was kinda fun. The upper schematic lays out the &#8230;<p><a href="http://psmay.com/2012/01/03/concept-push-and-pull/" class="more-link">Read More</a></p>]]></description>
			<content:encoded><![CDATA[<div id="attachment_444" class="wp-caption aligncenter" style="width: 574px"><a href="http://psmay.com/wp-content/uploads/2012/01/wpid-2012-01-03_17-05-37_807.jpg"><img class="size-full wp-image-444" title="wpid-2012-01-03_17-05-37_807.jpg" src="http://psmay.com/wp-content/uploads/2012/01/wpid-2012-01-03_17-05-37_807.jpg" alt="" width="564" height="1000" /></a><p class="wp-caption-text">This circuit has not been tested. It might work. It might not. Who knows? All diodes should probably be Schottky.</p></div>
<p>I contrived a diode-transistor logic (DTL) circuit for a SR latch<sup>[<a href="#concept-push-and-pull-n-1" class="footnoted" id="to-concept-push-and-pull-n-1">1</a>]</sup> with a CMOS push-pull output and a break-before-make mechanism to prevent simultaneous push and pull (shoot-through). I have no idea whether it actually works and there are probably easier ways to do it, but it was kinda fun.</p>
<p>The upper schematic lays out the concept in terms of OR gates with different inversions (clockwise from upper left: NOR, OR, AND, NAND). The output is fed back into the inputs through diode-resistor level shifts so that the one being fed into the high side is high when the output is high but low if the output is either low or off (high-impedance), and the one into the low side is low when the output is low, but high if the output is high or off. This feedback should prevent either output FET from turning on until the complement is turned off (or close to off).</p>
<p>The lower schematic is the upper schematic rendered in <a href="http://www.play-hookey.com/digital/electronics/dtl_gates.html">diode-transistor logic</a>. The lower-left gate, a NAND, is implemented using the textbook DTL NAND with an NPN transistor. The NOR in the upper left is actually the same as the NAND, but with the diodes reversed and a PNP on the output. Note that in both cases the feedback diode-resistor shift is now part of the gate itself. The other two gates are just <a href="http://www.play-hookey.com/digital/electronics/dl_gates.html">diode logic</a> since OR (upper right) and AND (lower right) can be implemented without a transistor on the output.</p>
<p>This contrivance is for a power logic buffer; the intended supply voltage would be somewhere from 12 to 48 volts and the current capacity on the output MOSFETs would be at least a couple of amps. I haven&#8217;t tested the thing. Please don&#8217;t use it, except in test circumstances, unless you know what you&#8217;re doing.</p>

<ol class="footnotes">
	<li class="footnote" id="concept-push-and-pull-n-1"><strong><sup>[1]</sup></strong> Technically, an S AND NOT R latch. <a class="note-return" href="#to-concept-push-and-pull-n-1">&#x21A9;</a></li></ol>
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		<title>Fun with Voltage Regulators</title>
		<link>http://psmay.com/2011/12/22/fun-with-voltage-regulators/</link>
		<comments>http://psmay.com/2011/12/22/fun-with-voltage-regulators/#comments</comments>
		<pubDate>Thu, 22 Dec 2011 18:54:39 +0000</pubDate>
		<dc:creator>psmay</dc:creator>
				<category><![CDATA[Data]]></category>
		<category><![CDATA[Electronics]]></category>

		<guid isPermaLink="false">http://psmay.com/?p=411</guid>
		<description><![CDATA[I&#8217;ve been spending a lot of time thinking about op amps and comparators lately. One of the common uses of an op amp is as a &#8220;unity gain&#8221; buffer, meaning that the output voltage is as close as possible to being the same as the input voltage. At a glance this might seem like a &#8230;<p><a href="http://psmay.com/2011/12/22/fun-with-voltage-regulators/" class="more-link">Read More</a></p>]]></description>
			<content:encoded><![CDATA[<p>I&#8217;ve been spending a lot of time thinking about op amps and comparators lately.</p>
<p>One of the common uses of an op amp is as a &#8220;unity gain&#8221; buffer, meaning that the output voltage is as close as possible to being the same as the input voltage. At a glance this might seem like a trivial thing, but it&#8217;s used to great advantage.</p>
<p>For example, a resistive voltage divider can be used to derive some fraction of a larger voltage by representing the ratio with resistors. Given a 9V supply, a divider over 100K and 47K would yield about 2.9V (9V * 47K/(100K+47K)). Unfortunately, this is of only limited use directly, since driving a load from the output causes that voltage to drop. This happens because the load itself acts as a resistor to ground in parallel with the divider, changing its resistance.</p>
<p>The divider does okay, though, feeding to a high-impedance input (i.e., one that doesn&#8217;t pull a lot of current). The inputs on an op amp fit that description, and its output is low-impedance (meaning that it can supply current without trouble). That&#8217;s a huge part of why op amps are useful. If you take the resistive divider&#8217;s output into the non-inverting (&#8220;+&#8221;) input of an op amp and the amp&#8217;s own output into the inverting (&#8220;-&#8221;) input, you get a unity gain buffer, an amplifier that outputs the same amplitude as the input (&#8220;unity gain&#8221; refers to the 1:1 ratio of input to output). The buffer continuously compares its output to the input. If the output is too high, it&#8217;s lowered; if too low, it&#8217;s raised.</p>
<p>In general, the op amp&#8217;s job is to perform an analog computation on its inputs that amounts to subtraction followed by multiplication. It subtracts the voltage of the inverting input from the voltage of the non-inverting input, then multiplies it by a factor called gain. By default, the gain is an arbitrarily high number called the open-loop gain of the amp. However, by feeding the output back into the inputs in different ways, it&#8217;s possible to fix the gain to a more useful value, such as 1 in the above scenario.<sup>[<a href="#fun-with-voltage-regulators-n-1" class="footnoted" id="to-fun-with-voltage-regulators-n-1">1</a>]</sup></p>
<p>Anyway, this ability to continuously adjust an output to a certain point reminded me of linear voltage regulators, like the 7805 and the LM317. I hypothesized that these 3-terminal regulators are basically heavy-duty op amps with a fixed voltage reference on one of the inputs. A little research confirmed this.</p>
<div id="attachment_429" class="wp-caption aligncenter" style="width: 555px"><a href="http://psmay.com/wp-content/uploads/2011/12/164500.jpg"><img class="size-large wp-image-429" title="Regulators" src="http://psmay.com/wp-content/uploads/2011/12/164500-e1324586639562-1024x807.jpg" alt="" width="545" height="429" /></a><p class="wp-caption-text">A linear voltage regulator is a voltage reference stuck to an op amp with high output current capability. Now you know—and knowing is half the battle.</p></div>
<p><em>[Note: The above image replaces a previous version that was less accurate.]</em></p>
<p>The data sheet for the fixed 7805 (and other 78xx) regulators suggested a circuit that allows the use of the regulator in an adjustable mode for voltages higher than the nominal voltage. Under normal circumstances, the regulator simply adjusts the output pin to be exactly 5V above the ground pin. In this mode, the ground pin is not tied to ground. Instead, the output and ground pin are placed across the high side of a resistive divider. The regulator fixes the voltage across the upper resistor to its face value. The lower resistor gets all of the current from the upper resistor, plus the garbage quiescent current from the machinery in the device. Multiplying this sum by the lower resistance yields, via Ohm&#8217;s law, the voltage across the lower resistor. The sum of that voltage and the regulated voltage is the output.</p>
<p>The data sheet for the LM317 shows a circuit essentially identical to the one described above with a few name changes. In fact, the &#8217;317, when used in the 7805&#8242;s nominal configuration, is itself a fixed 1.25V<sup>[<a href="#fun-with-voltage-regulators-n-2" class="footnoted" id="to-fun-with-voltage-regulators-n-2">2</a>]</sup> regulator.</p>
<p>Knowing that these regulators are so alike, then, why should we ever choose &#8217;317 over 7805? The answer: &#8217;317 has a subtle difference that makes it far more suitable in its adjustable mode: The current out of its adjustment terminal is a couple of orders of magnitude smaller<sup>[<a href="#fun-with-voltage-regulators-n-3" class="footnoted" id="to-fun-with-voltage-regulators-n-3">3</a>]</sup>, enough smaller in fact that it could be disregarded in many cases when calculating V<sub>out</sub>. This is especially useful in cases where the application doesn&#8217;t adjust the output voltage, but that requires a regulator for an awkward voltage (like the 13V programming voltage of a PIC). Using a 7805 in such an application might require a trimmer to fine-tune the output, while the &#8217;317 would probably be okay with a fixed-value resistor instead.</p>
<p>Pictured are the much simplified equivalent schematics, plus my derivation of how V<sub>out</sub> is calculated. R<sub>2</sub>I<sub>adj</sub> should be dominated by the rest of the expression.</p>

<ol class="footnotes">
	<li class="footnote" id="fun-with-voltage-regulators-n-1"><strong><sup>[1]</sup></strong> Incidentally, a comparator is basically a specialized op amp that has been optimized to only output high or low (i.e. in the logical sense). It works as specified above, but boils the problem down to &#8220;is the non-inverting input greater than the inverting input?&#8221; yielding high if so and low if not. An op amp can be used as a comparator, but actual comparators do the job faster and better. <a class="note-return" href="#to-fun-with-voltage-regulators-n-1">&#x21A9;</a></li>
	<li class="footnote" id="fun-with-voltage-regulators-n-2"><strong><sup>[2]</sup></strong> 1.25V is less arbitrary than you might think: It is the output of a <a href="http://en.wikipedia.org/wiki/Bandgap_voltage_reference">silicon bandgap reference</a>, which is designed to be steady and reliable in spite of temperature and environmental changes. Cool. <a class="note-return" href="#to-fun-with-voltage-regulators-n-2">&#x21A9;</a></li>
	<li class="footnote" id="fun-with-voltage-regulators-n-3"><strong><sup>[3]</sup></strong> 7805 I<sub>Q</sub> is 5mA typ., LM317 I<sub>adj</sub> is 50µA typ. <a class="note-return" href="#to-fun-with-voltage-regulators-n-3">&#x21A9;</a></li></ol>
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		<title>Whiteboard: RS Latch</title>
		<link>http://psmay.com/2011/12/20/whiteboard-rs-latch/</link>
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		<pubDate>Tue, 20 Dec 2011 21:44:09 +0000</pubDate>
		<dc:creator>psmay</dc:creator>
				<category><![CDATA[Data]]></category>
		<category><![CDATA[Electronics]]></category>
		<category><![CDATA[Whiteboard]]></category>

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		<description><![CDATA[An important building block in sequential logic. Remembers whether it is on or off.]]></description>
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<p>An important building block in sequential logic. Remembers whether it is on or off.</p>

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